1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to polymer layers for semiconductor workpieces and methods of patterning the same.
2. Description of the Related Art
Conventional semiconductor chips are routinely fabricated en masse in large groups as part of a single semiconductor wafer. At the conclusion of the processing steps to form the individual dice, a so-called dicing or sawing operation is performed on the wafer to cut out the individual dice. Thereafter, the dice may be packaged or directly mounted to a printed circuit board of one form or another. Conventional semiconductor dice are routinely cut out from the wafer as rectangular shapes. Many conventional semiconductor dice have four sides and four corners. The dicing operation is a mechanical cutting operation performed with a type of circular saw. Dicing saws are made with great care and operate more precisely than a comparable masonry circular saw.
In some conventional semiconductor wafer fabrication processes, the individual chips are bumped prior to singulation from the wafer. In some conventional designs, this entails patterning a top polyimide layer that is used for stress relief with openings positioned at intended bump locations and openings that track the locations of the dicing streets of the wafer. In some conventional processes, the polyimide film is used as an etch mask against a passivation structure etch that is necessary to create openings down to underlying top metallization pads. Using the polyimide film as the etch mask provides for more accurate alignment of bumps to underlying pads. However, the polyimide film must cover the entire chip prior to the passivation etch. If not, areas of the chips, such as exposed metallization, may be attacked by the etch in areas where there is no polyimide or passivation present. To achieve this necessary global polyimide coverage, the polyimide openings proximate the dicing streets are made very close and preferably in vertical alignment with the underlying edges of the dicing street. Since certain conventional dicing processes employ a two-step process that involves a first laser trench cutting process followed by a mechanical sawing process, the close proximity of the polyimide dicing street opening edges to the dicing street edges can create the risk of thermal damage or burning of the polyimide film during the laser cutting operation. This can lead to a host of problems, such as a device failure and yield issues. Some conventional processes provide for polyimide edge pull back from dicing street edges. However, those processes do not utilize the polyimide film as an etch mask for a passivation structure etch.
One conventional solution to the aforementioned problems is to enlarge the width of dicing streets on a semiconductor wafer. However, this will typically result in a lower gross die per wafer since wider dicing streets take up additional wafer space. Another conventional solution is to use a two-step process that involves first masking the passivation layer and etching the openings in the passivation layer followed by a polyimide coating process and exposure and development. However, this conventional process cannot provide the same accurate alignment between subsequent bumps and the underlying conductor pads.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.